Clock and Data Recovery (CDR) circuits form a part of Serial-Deserial (SerDes) receivers. The CDR circuits track the phase of a sampling clock based on some criterion, such as minimizing a Mean-Squared-Error (MSE). Conventional CDR circuits are commonly designed to achieve low target bit-error-ratios (BER) on the order of 10−12 to 10−15 errors per bit. The CDR circuits commonly used in practice can be broadly classified into two categories, baud-rate CDR and bang-bang CDR. Each class has associated advantages and disadvantages.
In a bang-bang, or Alexander type CDR, a received signal is sampled twice each symbol period. The symbol period is called a Unit Interval (UI). Ideally, one sample is obtained at a crossing boundary and another sample is obtained at a center of a slicer input “eye”. Two consecutive “center” data samples (i.e., d[k-1] and d[k]) and the crossing sample in-between (i.e., p[k]) are used to decide whether the current sampling phase is lagging or leading. The sampling phase is then corrected accordingly. In a bang-bang CDR, the eye looks symmetric about the sampling point, which is desirable for good sinusoidal jitter tolerance. However, better jitter tolerance comes at the cost of oversampling the signal. The oversampling adds cost and complexity to the system.
In a baud-rate CDR, the received signal is sampled at the baud rate or once every UI. Hence, oversampling does not occur in the baud-rate CDRs. The sampling phase can be chosen based on different criteria. For example, in an MSE baud-rate CDR, the sampling phase that yields a minimum MSE is chosen. In a Mueller-Muller baud-rate CDR, the sampling phase is chosen such that a first pre-cursor and a first post-cursor of an equalized pulse about the sampling point are equal. Thus, the sampling point chosen may not be in the center of the equalized eye if the equalized pulse is not symmetrical in terms of first pre-cursor and first post-cursor.
Referring to FIG. 1, a diagram of a conventional unequalized pulse response 10 and a conventional equalized pulse response 12 is shown. Consider a baud-rate CDR where a convergence point (i.e., settling point) relies on a pre-cursor matching a post-cursor. In the absence of a Receive Feed-Forward Equalizer (Rx-FFE), or if a transmit Finite Impulse Response (FIR) filter does not properly cancel the pre-cursor, a residual pre-cursor sample 14 (i.e., p−1(0)) has a major impact on the settling point τ of a Mueller-Muller baud-rate CDR. The residual pre-cursor sample 14 causes the Mueller-Muller baud-rate CDR to shift the sampling phase to the left of the peak (ideally the unequalized sample 16 at time=0) so that a first pre-cursor 18 (i.e., pe−1(τ)), with respect to the sampling point, is close to zero amplitude. Accordingly the magnitude of the first post-cursor 20 (i.e., p+1(0)) in the unequalized pulse response 10 increases from p+1(0) to p+1(τ) because of the shifting left.
Referring to FIG. 2, a diagram of a conventional slicer input eye 30 of a Decision-Feedback Equalizer (DFE) receiver with un-cancelled pre-cursor Inter-Symbol Interference (ISI) is shown. The DFE can cancel the post-cursor ISI in the unequalized pulse 10. The resulting equalized pulse 12 has the first pre-cursor 18 (i.e., pe−1(τ)=0) and a first equalized post-cursor sample 22 (i.e., pe+1(τ)=0) near the zero amplitude, where the superscript “e” denotes an equalized sample. Hence, the equalized eye 30 of the slicer is asymmetric about the sampling point τ. Particularly, a left horizontal eye opening (i.e., HL) is smaller than a right horizontal eye opening (i.e., HR). Therefore, a Sinusoidal Jitter Tolerance (SJT), which is the amplitude of sinusoidal jitter about the sampling point that can be tolerated without errors (i.e., 2*HL), is reduced compared with the ideal sample point at time=0. Thus, in optical applications where a transmitter FIR filter is not available, the Mueller-Muller baud-rate CDR suffers from poor SJT compared with the bang-bang CDR.